1. Field of the Invention
The present invention relates to a MOSFET input type BiMOS IC (Bipolar - MOSFET Integrated circuit) device.
2. Description of the Related Art
The BiMOS is known in the art. FIG. 1 shows an arrangement of the integrated circuit of such a type as set forth below.
As shown in FIG. 1, the integrated circuit comprises an npn type bipolar transistor Q1 and a p channel MOSFET Q2, the interconnection of which is as follows.
The collector C of the bipolar transistor Q1 is connected to a high potential source Vcc via a metal wire W1. The emitter E of the bipolar transistor Q1 is connected to a load R via a metal wire W2. The load R is connected a low potential source Vss. The source S of MOSFET Q2 is connected via a metal wire W3 to a node a between a high potential source Vcc and the collector C of the bipolar transistor Q1. The drain D of MOSFET Q2 is connected via a metal wire W4 to the base B of the bipolar transistor Q1. An input signal IN to the integrated circuit is supplied to the gate G of MOSFET Q2 via a metal wire W5. An output signal OUT is output from the integrated circuit, that is, a node b which is present between the emitter E and the load R.
The aforementioned MOSFET input type BiMOS integrated circuit is higher in switching rate than a bipolar transistor input type Darlington integrated circuit. The reason is that the input stage of the former integrated circuit is composed of an FET.
However, the amplification factor of the FET input type BiMOS integrated circuit is poorer than that of the bipolar transistor input type Darlington integrated circuit.